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LOS GATOS, Calif.--(BUSINESS WIRE)--Jan. 30, 2001--TransEDA, a leader in functional verification for electronic system-on-chip (SoC) and intellectual property (IP) designs, has announced the latest release of its VN-Cover(TM) Coverage Analysis tool.

Part of the Verification Navigator® integrated design verification environment, VN-Cover analyzes Verilog, VHDL and dual-language designs.

Simulation performance for the new release is up to ten times faster than the previous major release. Performance was improved by eliminating all runtime calls to the simulator and by using an efficient new toggle coverage metric. These improvements allow modern, optimized simulators to run at their full rated speed while collecting coverage information and are applicable over a wide variety of design styles.

``We've seen our coverage-enabled simulation time go from two weeks down to less than a day since moving to VN-Cover 6.2 and a new simulator,'' said Vivek Sagdeo of Chameleon Systems Inc. ``We used to perform coverage analysis only at the end of a project; but now we can use it regularly.''

VN-Cover now includes results filtering for faster sign-off on designs and shorter development cycles. Users can easily annotate and document code coverage exceptions and obtain more accurate coverage reports.

``Using the new results filtering feature in VN-Cover 6.2 has been beneficial for us,'' said Mark Dunn, vice president of PC development at Imagination Technologies plc. ``We'll be able to shave days or weeks off our development cycle because we can now get more accurate coverage reports without having to re-run simulations.''

VN-Cover provides a comprehensive set of code and functional coverage metrics, enabling designers to get a complete and accurate picture of the state of verification. It provides quantitative feedback on the effectiveness of the verification process and guidance on how to improve verification.

VN-Cover works with all leading Verilog, VHDL and dual-language simulators such as those from Cadence, Mentor Graphics and Synopsys.

Other tools included with VN-Cover 6.2 include:

-- VN-Optimize(TM) Test Suite Analysis, Limited Edition, a test suite

optimization tool for identifying the most effective tests for

regression runs, maximizing simulator resources, and avoiding

redundant simulation.

-- VN-State(TM) FSM Analysis, a finite state machine (FSM)

verification tool that reveals the quality of FSM verification by

automatically extracting FSMs, drawing the state diagram and

reporting state transition and visited-state coverage.

Verification Navigator

Verification Navigator is an integrated design verification environment providing a suite of tools that enable HDL designers to manage the verification process and shorten verification time. Tools included in Verification Navigator include the VN-Check(TM) Configurable HDL Checker, VN-Cover Coverage Analysis, VN-State FSM Analysis and VN-Optimize Test Suite Analysis.

Verification Navigator supports all leading Verilog, VHDL and dual-language simulation environments including Cadence Affirma NC-Verilog, NC-VHDL, NC-Sim, Verilog-XL and Leapfrog; Model Technology ModelSim Verilog, ModelSim VHDL and ModelSim SE; and Synopsys VCS, Scirocco and VSS. Verification Navigator is available on Solaris, HPUX, AIX, Linux, Windows NT and Windows 2000 platforms.

Pricing and Availability

VN-Cover is priced from $20,000 U.S. and is available immediately.

About TransEDA

TransEDA PLC (symbol TRA on the London Stock Exchange) develops and markets design verification solutions that perform configurable HDL checking, coverage analysis, test suite analysis, and state machine analysis for electronic integrated circuits (ICs) and systems on a chip (SOC). TransEDA's customers include 18 of the top 20 semiconductor vendors, which represent 74% of the worldwide semiconductor industry. For more information, contact TransEDA at 985 University Avenue, Los Gatos, Calif., 95032, telephone 408/335-1300, fax 408/335-1319, e-mail info@transeda.com, or visit http://www.transeda.com.

All trademarks are the property of their respective owners.

     TransEDA
     Tom Borgstrom, 408/335-1303
     tom.borgstrom@transeda.com
         or
     Cayenne Communication
     Michelle Clancy, 252/940-0981
     michelle.clancy@cayennecom.com
         or
     PentaCom
     Sharon Graves, +44 1242 525205
     sharon.graves@btinternet.com